Recently, semiconductor devices are becoming more and more miniaturized and dimensional control with a higher degree of precision is required. Consequently, dimensional control by means of length measurement apparatus using an electron beam, based on a scanning electronic microscope, is implemented on semiconductor manufacturing site. Measuring precision of this dimensional control depends on the precision of magnification calibration of the scanning electronic microscope.
Measurement is performed at high magnification to handle miniaturized semiconductor devices, which results in that the field of view of the scanning electronic microscope becomes a narrow region. Therefore, the miniaturization of a standard sample for magnification calibration is required to a degree equivalent to or finer than the miniaturization degree of a semiconductor pattern. In an attempt to satisfy this, superlattice samples as made public in Patent Document 1 and Non-patent Document 1 are proposed as calibration samples miniaturized to a degree of a pitch linewidth of 100 nm or less.